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Microchip Technology /ATSAMD51P19A /OSCCTRL /DFLLCTRLB

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Interpret as DFLLCTRLB

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7 43 0 0 00 0 0 0 0 0 0 0 0 (MODE)MODE 0 (STABLE)STABLE 0 (LLAW)LLAW 0 (USBCRM)USBCRM 0 (CCDIS)CCDIS 0 (QLDIS)QLDIS 0 (BPLCKC)BPLCKC 0 (WAITLOCK)WAITLOCK

Description

DFLL48M Control B

Fields

MODE

Operating Mode Selection
STABLE

Stable DFLL Frequency
LLAW

Lose Lock After Wake
USBCRM

USB Clock Recovery Mode
CCDIS

Chill Cycle Disable
QLDIS

Quick Lock Disable
BPLCKC

Bypass Coarse Lock
WAITLOCK

Wait Lock

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data